R10000 Microprocessor User's Manual
6. System Interface Operations
The R10000 System interface provides a gateway between processor, with its associated secondary cache, and the remainder of the computer system.
For convenience, any device communicating with the processor through the System interface is referred to as the external agent.
Chapter Contents
- 6.1 - Request and Response Cycles
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- 6.2 - System Interface Frequencies
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- 6.3 - Register-to-Register Operation
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- 6.4 - System Interface Signals
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- 6.5 - Master and Slave States
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- 6.6 - Connecting to an External Agent
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- 6.7 - Cluster Bus
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- 6.8 - System Interface Connections
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- 6.9 - System Interface Requests and Responses
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- 6.10 - System Interface Buffers
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- 6.11 - System Interface Flow Control
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- 6.12 - System Interface Block Data Ordering
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- 6.13 - System Interface Bus Encoding
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- 6.14 - Interrupts
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- 6.15 - Protocol Abbreviations
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- 6.16 - System Interface Arbitration
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- 6.17 - System Interface Request and Response Protocol
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- 6.18 - System Interface Coherency
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- 6.19 - Cluster Bus Operation
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- 6.20 - Support for I/O
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- 6.21 - Support for External Duplicate Tags
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- 6.22 - Support for a Directory-Based Coherency Protocol
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- 6.23 - Support for Uncached Attribute
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- 6.24 - Support for Hardware Emulation
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Copyright 1995, MIPS Technologies, Inc. -- 29 JAN 96
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